HD6433308 Datasheet, PDF (107/349 Pages) Hitachi Semiconductor – Hitachi Single-Chip MicroComputer

See section 9, “Serial Communication Interface” for details of the serial control bits. Pins used by
the serial communication interface are switched between input and output without regard to the
values in the data direction register.
Pins of port 5 can drive a single TTL load and a 30pF capacitive load when they are used as output
pins. They can also drive a Darlington pair. When used as input pins, they have programmable
MOS pull-ups.
Table 5-11 details the port 5 registers.
Table 5-11. Port 5 Registers
Name
Port 5 data direction register
Port 5 data register
Abbreviation
P5DDR
P5DR
Read/Write
W
R/W
Initial value
H’F8
H’F8
Address
H’FFB8
H’FFBA
Port 5 Data Direction Register (P5DDR)—H’FFB8
Bit
7
6
5
4
3
2
1
0
—
—
—
—
— P52DDR P51DDR P50DDR
Initial value
1
1
1
1
1
0
0
0
Read/Write
—
—
—
—
—
W
W
W
P5DDR is an 8-bit register that selects the direction of each pin in port 5. A pin functions as an
output pin if the corresponding bit in P5DDR is set to “1,” and as an input pin if the bit is cleared to
“0.”
Port 5 Data Register (P5DR)—H’FFBA
Bit
7
6
5
4
3
2
1
0
—
—
—
—
—
P52
P51
P50
Initial value
1
1
1
1
1
0
0
0
Read/Write
—
—
—
—
—
R/W R/W R/W
P5DR is an 8-bit register containing the data for pins P52 to P50. When the CPU reads P5DR, for
output pins (P5DDR = "1") it reads the value in the P5DR latch, but for input pins (P5DDR = "0"),
it obtains the logic level directly from the pin, bypassing the P5DR latch. This also applies to pins
92