HD6433308 Datasheet, PDF (321/349 Pages) Hitachi Semiconductor – Hitachi Single-Chip MicroComputer

TOCR—Timer Output Control Register
H’FF97
FRT
Bit
7
6
—
—
Initial value 1
1
Read/Write —
—
5
4
3
2
1
0
— OCRS OEA OEB OLVLA OLVLB
1
0
0
0
0
0
—
R/W R/W R/W R/W R/W
Output Level B
0 Compare-match B causes “0” output.
1 Compare-match B causes “1” output.
Output Level A
0 Compare-match A causes “0” output.
1 Compare-match A causes “1” output.
Output Enable B
0 Output compare B output is disabled.
1 Output compare B output is enabled.
Output Enable A
0 Output compare A output is disabled.
1 Output compare A output is enabled.
Output Compare Register Select
0 The CPU can access OCRA at addresses H’FF94 – H’FF95.
1 The CPU can access OCRB at addresses H’FF94 – H’FF95.
ICRA (H and L)—Input Capture Register
H’FF98, H’FF99 FRT
Bit
7
6
5
4
3
2
1
0
Initial value 0
0
0
0
0
0
0
0
Read/Write R
R
R
R
R
R
R
R
Contains FRC count captured on FTIA input.
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