HD6433308 Datasheet, PDF (194/349 Pages) Hitachi Semiconductor – Hitachi Single-Chip MicroComputer

9.1.4 Register Configuration
Table 9-2 lists the SCI registers.
Table 9-2. SCI Registers
Name
Receive shift register
Receive data register
Transmit shift register
Transmit data register
Serial mode register
Serial control register
Serial status register
Bit rate register
Abbreviation
RSR
RDR
TSR
TDR
SMR
SCR
SSR
BRR
R/W
—
R
—
R/W
R/W
R/W
R/(W)*
R/W
Initial value
—
H’00
—
H’FF
H’04
H’0C
H’87
H’FF
Address
—
H’FFDD
—
H’FFDB
H’FFD8
H’FFDA
H’FFDC
H’FFD9
Notes:
* Software can write a “0” to clear the status flag bits, but cannot write a “1.”
9.2 Register Descriptions
9.2.1 Receive Shift Register (RSR)
Bit
7
6
5
4
3
2
1
0
Read/Write
—
—
—
—
—
—
—
—
The RSR receives incoming data bits. When one data character (1 byte) has been received, it is
transferred to the receive data register (RDR).
The CPU cannot read or write the RSR directly.
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