HD6433308 Datasheet, PDF (112/349 Pages) Hitachi Semiconductor – Hitachi Single-Chip MicroComputer

See section 4 “Exception Handling” and section 6, “Free-Running Timer Module” for details of the
free-running timer and interrupts.
Pins of port 6 can drive a single TTL load and a 90pF capacitive load when they are used as output
pins. They can also drive a Darlington pair. When they are used as input pins, they have
programmable MOS pull-ups.
Table 5-13 details the port 6 registers.
Table 5-13. Port 6 Registers
Name
Abbreviation
Port 6 data direction register P6DDR
Port 6 data register
P6DR
Read/Write Initial value
W
H’00
R/W
H’00
Address
H’FFB9
H’FFBB
Port 6 Data Direction Register (P6DDR)—H’FFB9
Bit
Initial value
Read/Write
7
6
5
4
3
2
1
0
P67DDR P66DDR P65DDR P64DDR P63DDR P62DDR P61DDR P60DDR
0
0
0
0
0
0
0
0
W
W
W
W
W
W
W
W
P6DDR is an 8-bit register that selects the direction of each pin in port 6. A pin functions as an
output pin if the corresponding bit in P6DDR is set to “1,” and as an input pin if the bit is cleared to
“0.”
Port 6 Data Register (P6DR)—H’FFBB
Bit
Initial value
Read/Write
7
6
5
4
3
2
1
0
P67
P66
P65
P64
P63
P62
P61
P60
0
0
0
0
0
0
0
0
R/W R/W R/W R/W R/W R/W R/W R/W
P6DR is an 8-bit register containing the data for pins P67 to P60. When the CPU reads P6DR, for
output pins (P6DDR = "1") it reads the value in the P6DR latch, but for input pins (P6DDR = "0"),
it obtains the logic level directly from the pin, bypassing the P6DR latch. This also applies to pins
used for input and output of timer and interrupt signals.
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