HD6433308 Datasheet, PDF (283/349 Pages) Hitachi Semiconductor – Hitachi Single-Chip MicroComputer

Table 17-6. Timing Conditions of On-Chip Supporting Modules (cont.)
Conditions: VCC = 5.0V ±10%, Ø = 0.5 to 10MHz, VSS = 0V,
Ta = –20 to 75˚C (regular specifications), Ta = –40 to 85˚C (wide-range specifications)
TMR
PWM
SCI
Ports
Measurement 6MHz
Item
Symbol conditions min max
Timer output tTMOD Fig. 17-13 – 100
delay time
Timer reset
tTMRS Fig. 17-15
50 –
input setup time
Timer clock
tTMCS Fig. 17-14
50 –
input setup time
Timer clock
tTMCWH Fig. 17-14
1.5 –
pulse width
(single edge)
Timer clock
tTMCWL Fig. 17-14
2.5 –
pulse width
(both edges)
Timer output tPWOD Fig. 17-16 – 100
delay time
Input (Async) tscyc Fig. 17-17 2 –
clock (Sync) tscyc Fig. 17-17 4 –
cycle
Transmit data tTXD Fig. 17-17 – 100
delay time (Sync)
Receive data tRXS Fig. 17-17 100 –
setup time (Sync)
Receive data tRXH Fig. 17-17 100 –
hold time (Sync)
Input clock
tSCKW Fig. 17-18
0.4 0.6
pulse width
Output data
tPWD Fig. 17-19 – 100
delay time
Input data setup tPRS Fig. 17-19 50 –
time
Input data hold tPRH Fig. 17-19 50 –
time
8MHz
min max
– 100
50 –
50 –
1.5 –
2.5 –
– 100
2–
4–
– 100
100 –
100 –
0.4 0.6
– 100
50 –
50 –
10MHz
min max Unit
– 100 ns
50 – ns
50 – ns
1.5 – tcyc
2.5 – tcyc
– 100 ns
2
–
tcyc
4
–
tcyc
– 100 ns
100 – ns
100 – ns
0.4 0.6 tscyc
– 100 ns
50 – ns
50 – ns
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