HD6433308 Datasheet, PDF (165/349 Pages) Hitachi Semiconductor – Hitachi Single-Chip MicroComputer

Table 6-4. Effect of Changing Internal Clock Sources
No. Description
Low → Low:
CKS1 and CKS0 are
1
rewritten while both
clock sources are Low.
Timing chart
Old clock
source
New clock
source
FRC clock
pulse
FRC
N
N +1
Low → High:
CKS1 and CKS0 are
2
rewritten while old
clock source is Low and
new clock source is High.
Old clock
source
New clock
source
FRC clock
pulse
CKS rewrite
FRC
N
N +1
N +2
CKS rewrite
High → Low:
CKS1 and CKS0 are
3
rewritten while old
clock source is High and
new clock source is Low.
Old clock
source
New clock
source
FRC clock
pulse
FRC
N
*
N +1
N +2
CKS rewrite
* The switching of clock sources is regarded as a falling edge that increments the FRC.
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