HD6433308 Datasheet, PDF (100/349 Pages) Hitachi Semiconductor – Hitachi Single-Chip MicroComputer

pins. They can also drive a Darlington pair. When they are used as input pins, they have
programmable MOS pull-ups.
Table 5-7 details the port 3 registers.
Table 5-7. Port 3 Registers
Name
Abbreviation
Port 3 data direction register P3DDR
Port 3 data register
P3DR
Read/Write Initial value
W
H’00
R/W
H’00
Address
H’FFB4
H’FFB6
Port 3 Data Direction Register (P3DDR)—H’FFB4
Bit
Initial value
Read/Write
7
6
5
4
3
2
1
0
P37DDR P36DDR P35DDR P34DDR P33DDR P32DDR P31DDR P30DDR
0
0
0
0
0
0
0
0
W
W
W
W
W
W
W
W
P3DDR is an 8-bit register that selects the direction of each pin in port 3. A pin functions as an
output pin if the corresponding bit in P3DDR is set to “1,” and as an input pin if the bit is cleared to
“0.”
Port 3 Data Register (P3DR)—H’FFB6
Bit
Initial value
Read/Write
7
6
5
4
3
2
1
0
P37
P36
P35
P34
P33
P32
P31
P30
0
0
0
0
0
0
0
0
R/W R/W R/W R/W R/W R/W R/W R/W
P3DR is an 8-bit register containing the data for pins P37 to P30. When the CPU reads P3DR, for
output pins it reads the value in the P3DR latch, but for input pins, it obtains the logic level directly
from the pin, bypassing the P3DR latch.
MOS Pull-Ups: Are available for input pins in mode 3 when the dual-port RAM is disabled.
Software can turn on the MOS pull-up on by writing a “1” in P3DR, and turn it off by writing a
“0.”
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