HD6433308 Datasheet, PDF (199/349 Pages) Hitachi Semiconductor – Hitachi Single-Chip MicroComputer

Bit 4 – Receive Enable (RE): This bit enables or disables the receive function. When the receive
function is enabled, the ARxD or CRxD pin is automatically used for input. When the receive
function is disabled, the ARxD or CRxD pin is available as a general-purpose I/O port.
Bit 4
RE Description
0 The receive function is disabled. The ARxD and CRxD pins can be
used for general-purpose I/O.
1 The receive function is enabled. When C/A = 0, the ARxD pin is used
for input. When C/A = 1, the CRxD pin is used for input.
(Initial value)
Bits 3 and 2 – Reserved: These bits cannot be modified and are always read as “1.”
Bit 1 – Clock Enable 1 (CKE1): This bit selects the internal or external clock source for the baud
rate generator. When the external clock source is selected, the ASCK or CSCK pin is automatically
used for input of the external clock signal.
Bit 1
CKE1
0
1
Description
Internal clock source. (When C/A = 1, the CSCK pin is used
for output.)
External clock source. (When C/A = 1, the CSCK pin is used
for input. When C/A = 0, the ASCK pin is used for input.)
(Initial value)
Bit 0 – Clock Enable 0 (CKE0): When an internal clock source is used in asynchronous mode,
this bit enables or disables serial clock output at the ASCK pin.
This bit is ignored when the external clock is selected, or when the synchronous mode is selected.
Bit 0
CKE0
0
1
Description
The ASCK pin is not used by the SCI (and is available as
a general-purpose I/O port).
The ASCK pin is used for serial clock output.
(Initial value)
For further information on clock source selection, see Table 9-6 in Section 9.3, “Operation.”
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