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| HD6433308 Datasheet, PDF (231/349 Pages) Hitachi Semiconductor – Hitachi Single-Chip MicroComputer | |||
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ADST
ADF
Channel 0 (AN 0)
Channel 1 (AN 1)
Channel 2 (AN 2)
Channel 3 (AN 3)
ADDRA
ADDRB
Set *1
Continuous A/D conversion
Clear *1
Waiting
A/D conver-
sion Â
Waiting
Waiting
A/D conver-
sion Â
Waiting
Transfer
A/D conver-
sion Â
Waiting
A/D conver-
sion result Â
A/D conversion
time
A/D conver-
sion Â
Waiting
A/D conver- *2
sion Â
Clear * 1
Waiting
Waiting
Waiting
A/D conversion result Â
A/D conversion resultÂ
ADDRC
A/D conversion result Â
ADDRD
*1 indicates execution of a software instruction
*2 Data undergoing conversion when ADST bit is cleared are ignored.
Figure 10-4. A/D Operation in Scan Mode (When Channels 0 to 2 are Selected)
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