HD6433308 Datasheet, PDF (208/349 Pages) Hitachi Semiconductor – Hitachi Single-Chip MicroComputer

Table 9-7. Data Formats in Asynchronous Mode
SMR bits
CHR PE
0
0
0
0
0
1
0
1
1
0
1
0
1
1
1
1
STOP
0
1
0
1
0
1
0
1
Data format
START
START
START
START
START
START
START
START
8-Bit data
8-Bit data
8-Bit data
8-Bit data
7-Bit data
7-Bit data
7-Bit data
7-Bit data
Note
START: Start bit
STOP: Stop bit
P: Parity bit
STOP
STOP
P
P
STOP
STOP
P
P
STOP
STOP
STOP
STOP
STOP
STOP STOP
STOP
(2) Clock: In the asynchronous mode it is possible to select either an internal clock created by the
on-chip baud rate generator, or an external clock input at the ASCK pin. Refer to Table 9-6.
If an external clock is input at the ASCK pin, its frequency should be 16 times the desired baud
rate.
If the internal clock provided by the on-chip baud rate generator is selected and the ASCK pin is
used for clock output, the output clock frequency is equal to the baud rate, and the clock pulse rises
at the center of the transmit data bits. Figure 9-3 shows the phase relationship between the output
clock and transmit data.
Output clock
Transmit data
Start bit
D1
D2
D3
Figure 9-3. Phase Relationship Between Clock Output and Transmit Data
195