HD6433308 Datasheet, PDF (346/349 Pages) Hitachi Semiconductor – Hitachi Single-Chip MicroComputer

Table C-1. Pin States (cont.)
Pin
name
P80/E
P97/WAIT
P96/Ø
P95 – P93,
AS, WR, RD
P92 – P90,
MCU
mode
1
2
Reset
E clock
output
3
3-State
1
3-State
2
3
1
Clock
2
output
3
3-State
1
High
2
3
3-State
1
3-State
2
3
Hardware
standby
3-State
3-State
Software
standby
Low if
DDR = 1,
3-state if
DDR = 0
Prev. state
3-State
Sleep
mode
E clock if
DDR = 1,
3-state if
DDR = 0
Prev. state
3-State
Normal
operation
E clock if
DDR = 1,
3-state if
DDR = 0
I/O port
WAIT
3-state
3-State
3-State
Prev. state
High
High if
DDR = 1,
3-state if
DDR = 0
High
Prev. state
Prev. state
Prev. state I/O port
Clock
Clock
output
output
Clock output Clock output
if DDR = 1, if DDR = 1,
3-state if input port if
DDR = 0 DDR = 0
High
AS, WR,
RD
Prev. state I/O port
Prev. state I/O port
Notes:
1. 3-state: High-impedance state
2. Prev. state: Previous state. Input ports are in the high-impedance state (with the MOS pull-up
on if DDR = 0 and DR = 1). Output ports hold their previous output level.
3. On-chip supporting modules are initialized, so these pins revert to I/O ports according to the
DDR and DR bits.
4. I/O port: Direction depends on the data direction (DDR) bit. Note that these pins may also be
used by the on-chip supporting modules.
See section 5, “I/O Ports” for further information.
338