HD6433308 Datasheet, PDF(295/349 Page) Hitachi Semiconductor – Hitachi Single-Chip MicroComputer

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HD6433308 Datasheet, PDF (295/349 Pages) Hitachi Semiconductor – Hitachi Single-Chip MicroComputer

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17.3.8 Dual-Port RAM Timing

(1) Read Cycle 1

RS3 to RS0

OE

tDAA

tDOE

CS

DDB7 to DDB0

tDACS

Note: WE should be High during a read cycle.

(2) Read Cycle 2

tDOH

tDOHZ

tDCHZ

RS3 to RS0

DDB7 to DDB0

tDAA

tDOH

tDOH

Notes: 1. WE should be High during a read cycle.

2. CS = VIL

3. OE = VIL

(3) Read Cycle 3

CS

tDACS

tDCHZ

DDB7 to DDB0

Notes: 1. WE should be High during a read cycle.

2. The address on the register select lines should be set up by the time CS goes Low, or before that time.

3. OE = VIL

Figure 17-20. Dual-Port RAM Read Timing

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