HD6433308 Datasheet, PDF (237/349 Pages) Hitachi Semiconductor – Hitachi Single-Chip MicroComputer

11.1.2 Block Diagram
Figure 11-1 shows a block diagram of the dual-port RAM.
Internal
data bus
Bus interface
Module data bus
MREI
MWEI
P
C
C
PP
CC
DD
S
R
RR
00
AB
P
P
C
C
D to D
R
R
1
14
CS
OE
WE
RDY
Bus interface
PCCSR: Parallel Communication Control/Status Register
PCDR0: Parallel Communication Data Register 0
PCDR1 to 14 : Paralle Communication Data Register 1 to 14
Figure 11-1. Block Diagram of Dual-Port RAM
DDB7 to DDB0
RS3 to RS0
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