HD6433308 Datasheet, PDF (120/349 Pages) Hitachi Semiconductor – Hitachi Single-Chip MicroComputer

Port 8 Data Direction Register (P8DDR)—H’FFBD
Bit
7
6
5
4
3
2
1
0
— P86DDR P85DDR P84DDR P83DDR P82DDR P81DDR P80DDR
Modes 1 and 2
Initial value
1
0
0
0
0
0
0
1
Read/Write
—
W
W
W
W
W
W
W
Mode 3
Initial value
1
0
0
0
0
0
0
0
Read/Write
—
W
W
W
W
W
W
W
P8DDR is an 8-bit register that selects the direction of each pin in port 8. A pin functions as an
output pin if the corresponding bit in P8DDR is set to “1,” and as in input pin if the bit is cleared to
“0.”
Bit 7 is reserved. It cannot be modified, and is always read as "1."
Port 8 Data Register (P8DR)—H’FFBF
Bit
Initial value
Read/Write
7
6
5
4
3
2
1
0
—
P86
P85
P84
P83
P82
P81
P80
1
0
0
0
0
0
0
0
— R/W R/W R/W R/W R/W R/W R/W
P8DR is an 8-bit register containing the data for pins P86 to P80. When the CPU reads P8DR, for
output pins (P8DDR = "1") it reads the value in the P8DR latch, but for input pins (P8DDR = "0"),
it obtains the logic level directly from the pin, bypassing the P8DR latch. This also applies to pins
used for dual-port RAM register select input, interrupt input, serial communication, and E clock or
IOS output.
Bit 7 is reserved. It cannot be modified, and is always read as "1."
MOS Pull-Ups: Are available for input pins in all modes, including pins used for dual-port RAM
register select input, interrupt input, or serial communication input. Software can turn the MOS
pull-up on by writing a “1” in P8DR, and turn it off by writing a “0.”
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