HD6433308 Datasheet, PDF (337/349 Pages) Hitachi Semiconductor – Hitachi Single-Chip MicroComputer

BRR—Bit Rate Register
H’FFD9
SCI
Bit
7
6
5
4
3
2
1
0
Initial value 1
1
1
1
1
1
1
1
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Constant that determines the bit rate
SCR—Serial Control Register
H’FFDA
SCI
Bit
7
6
5
4
3
TIE RIE
TE
RE
—
Initial value 0
0
0
0
1
Read/Write R/W R/W R/W R/W —
2
1
0
— CKE1 CKE0
1
0
0
— R/W R/W
Clock Enable 0
0 Asynchronous serial clock not output
1 Asynchronous serial clock output at ASCK pin
Clock Enable 1
0 Internal clock
1 External clock, input at ASCK or CSCK pin
Receive Enable
0 Receive disabled
1 Receive enabled
Transmit Enable
0 Transmit disabled
1 Transmit enabled
Receive Interrupt Enable
0 Receive interrupt request (RxI) is disabled.
1 Receive interrupt request (RxI) is enabled.
Transmit Interrupt Enable
0 Transmit interrupt request (TxI) is disabled.
1 Transmit interrupt request (TxI) is enabled.
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