HD6433308 Datasheet, PDF (204/349 Pages) Hitachi Semiconductor – Hitachi Single-Chip MicroComputer

Table 9-3. Examples of BRR Settings in Asynchronous Mode (4)
Bit
rate n
110 2
150 2
300 1
600 1
1200 0
2400 0
4800 0
9600 0
19200 0
31250 —
38400 0
14.7456
Error
N (%) n
130 –0.07 2
95 0
2
191 0
1
95 0
1
191 0
0
95 0
0
47 0
0
23 0
0
11 0
0
—— 0
50
—
XTAL Frequency (MHz)
16
19.6608
20
Error
Error
N (%) n N
(%) n
141 +0.03 2 174 –0.26 3
103 +0.16 2 127 0
2
207 +0.16 1 255 0
2
103 +0.16 1 127 0
1
207 +0.16 0 255 0
1
103 +0.16 0 127 0
0
51 +0.16 0 63 0
0
25 +0.16 0 31 0
0
12 +0.16 0 15 0
0
70
09
–1.70 0
—— 0 7
0
0
Note: If possible, the error should be within 1%.
B = OSC × 106/[64 × 22n × (N + 1)]
N: BRR value (0 ≤ N ≤ 255)
OSC: Crystal oscillator frequency in MHz
B: Bit rate (bits/second)
n: Internal clock source (0, 1, 2, or 3)
The meaning of n is given by the table below:
n
CKS1 CKS0 Clock
0
0
0
Ø
1
0
1
Ø/4
2
1
0
Ø/16
3
1
1
Ø/64
Error
N (%)
43 +0.88
129 +0.16
64 +0.16
129 +0.16
64 +0.16
129 +0.16
64 +0.16
32 –1.36
15 +1.73
90
7 +1.73
191