HD6433308 Datasheet, PDF (193/349 Pages) Hitachi Semiconductor – Hitachi Single-Chip MicroComputer

9.1.2 Block Diagram
Module data bus
Internal
data bus
RDR
TDR
SSR
BRR
SCR
ARxD/
CRxD
ATxD/
CTxD
RSR
TSR
Parity
generate
SMR
Communi-
cation
control
Baud rate
generator
Clock
Ø Internal
Ø/4 clock
Ø/16
Ø/64
Parity check
ASCK/
CSCK
RSR:
RDR:
TSR:
TDR:
SMR:
SCR:
SSR:
BRR:
Receive Shift Register (8 bits)
Receive Data Register (8 bits)
Transmit Shift Register (8 bits)
Transmit Data Register (8 bits)
Serial Mode Register (8 bits)
Serial Control Register (8 bits)
Serial Status Register (8 bits)
Bit Rate Register (8 bits)
External clock source
TXI
RXI
ERI
Interrupt signals
Figure 9-1. Block Diagram of Serial Communication Interface
9.1.3 Input and Output Pins
Table 9-1 lists the input and output pins used by the SCI module.
Table 9-1. SCI Input/Output Pins
Name
Asynchronous serial clock
Asynchronous receive data
Asynchronous transmit data
Synchronous serial clock
Synchronous receive data
Synchronous transmit data
Abbreviation
ASCK
ARxD
ATxD
CSCK
CRxD
CTxD
I/O
Input/output
Input
Output
Input/output
Input
Output
Function
Serial clock input and output.
Receive data input.
Transmit data output.
Serial clock input and output.
Receive data input.
Transmit data output.
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