S9S12XS256J0CAL Datasheet, PDF (96/738 Pages) Freescale Semiconductor, Inc – Microcontrollers

Port Integration Module (S12XSPIMV1)
2.3.33 PIM Reserved Register
Address 0x024F
7
6
5
4
3
2
R
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
= Unimplemented or Reserved
u = Unaffected by reset
1 _{Read: Always reads 0x00}
Write: Unimplemented
Figure 2-31. PIM Reserved Register
Access: User read¹
1
0
0
0
0
0
2.3.34 Port M Data Register (PTM)
Address 0x0250
7
R
PTM7
W
6
PTM6
5
PTM5
4
PTM4
3
PTM3
2
PTM2
Altern.
Function
—
—
(SCK0)
(MOSI0)
(SS0)
(MISO0)
—
—
—
—
—
—
Reset
0
0
0
0
0
0
Figure 2-32. Port M Data Register (PTM)
1 _{Read: Anytime, the data source depends on the data direction value}
Write: Anytime
Access: User read/write¹
1
0
PTM1
PTM0
TXCAN0
(TXD1)
0
RXCAN0
(RXD1)
0
Field
7-6
PTM
5
PTM
Table 2-30. PTM Register Field Descriptions
Description
Port M general purpose input/output data—Data Register
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
Port M general purpose input/output data—Data Register, routed SPI0 SCK input/output
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
• The SPI0 function takes precedence over the general purpose I/O function if enabled.
S12XS Family Reference Manual, Rev. 1.13
96
Freescale Semiconductor