S9S12XS256J0CAL Datasheet, PDF (88/738 Pages) Freescale Semiconductor, Inc – Microcontrollers

Port Integration Module (S12XSPIMV1)
1 _{Read: Anytime}
Write: Anytime
Table 2-19. RDRT Register Field Descriptions
Field
7-0
RDRT
Description
Port T reduced drive—Select reduced drive for output pin
This bit configures the drive strength of the associated output pin as either full or reduced. If a pin is used as input
this bit has no effect. The reduced drive function is independent of which function is being used on a particular pin.
1 Reduced drive selected (approx. 1/5 of the full drive strength)
0 Full drive strength enabled
2.3.22 Port T Pull Device Enable Register (PERT)
Address 0x0244
R
W
Reset
7
PERT7
0
1 _{Read: Anytime}
Write: Anytime
6
PERT6
5
PERT5
4
PERT4
3
PERT3
2
PERT2
0
0
0
0
0
Figure 2-20. Port T Pull Device Enable Register (PERT)
Access: User read/write¹
1
0
PERT1
PERT0
0
0
Table 2-20. PERT Register Field Descriptions
Field
7-0
PERT
Description
Port T pull device enable—Enable pull device on input pin
This bit controls whether a pull device on the associated port input pin is active. If a pin is used as output this bit has
no effect. The polarity is selected by the related polarity select register bit.
1 Pull device enabled
0 Pull device disabled
2.3.23 Port T Polarity Select Register (PPST)
Address 0x0245
R
W
Reset
7
PPST7
0
1 _{Read: Anytime}
Write: Anytime
6
PPST6
5
PPST5
4
PPST4
3
PPST3
2
PPST2
0
0
0
0
0
Figure 2-21. Port T Polarity Select Register (PPST)
Access: User read/write¹
1
0
PPST1
PPST0
0
0
S12XS Family Reference Manual, Rev. 1.13
88
Freescale Semiconductor