S9S12XS256J0CAL Datasheet, PDF (59/738 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 2
Port Integration Module (S12XSPIMV1)
Revision History
Revision
Number
Revision Date
Sections
Affected
Description of Changes
V01.07
V01.08
08 Feb 2011
08 Jul 2011
2.3.55/2-111
2.3.56/2-111
2.3.57/2-112
• Corrected addresses of PPSH,PIEH and PIFH in Register Descriptions
Table 2-2./2-65 • Corrected typo in PPSP register name in register map
V01.09 11 Sep 2012
• Minor editorial corrections
2.1 Introduction
2.1.1 Overview
The S12XS family Port Integration Module establishes the interface between the peripheral modules and
the I/O pins for all ports. It controls the electrical pin properties as well as the signal prioritization and
multiplexing on shared pins.
This document covers:
• Port A, B and K used as general purpose I/O
• Port E associated with the IRQ, XIRQ interrupt inputs
• Port T associated with 1 timer module
• Port S associated with 2 SCI module and 1 SPI module
• Port M associated with 1 MSCAN
• Port P connected to the PWM - inputs can be used as an external interrupt source
• Port H and J used as general purpose I/O - inputs can be used as an external interrupt source
• Port AD associated with one 16-channel ATD module
Most I/O pins can be configured by register bits to select data direction and drive strength, to enable and
select pull-up or pull-down devices.
S12XS Family Reference Manual, Rev. 1.13
Freescale Semiconductor
59