S9S12XS256J0CAL Datasheet, PDF (75/738 Pages) Freescale Semiconductor, Inc – Microcontrollers

Port Integration Module (S12XSPIMV1)
2.3.3 Port A Data Register (PORTA)
Address 0x0000 (PRR)
7
6
5
4
3
2
R
PA7
PA6
PA5
PA4
PA3
PA2
W
Reset
0
0
0
0
0
0
Figure 2-1. Port A Data Register (PORTA)
1 _{Read: Anytime, the data source depends on the data direction value}
Write: Anytime
Access: User read/write¹
1
0
PA1
PA0
0
0
Field
7-0
PA
Table 2-4. PORTA Register Field Descriptions
Description
Port A general purpose input/output data—Data Register
The associated pin can be used as general purpose I/O. In general purpose output mode the register bit value is
driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
2.3.4 Port B Data Register (PORTB)
Address 0x0001 (PRR)
7
6
5
4
3
2
R
PB7
PB6
PB5
PB4
PB3
PB2
W
Reset
0
0
0
0
0
0
Figure 2-2. Port B Data Register (PORTB)
1 _{Read: Anytime, the data source depends on the data direction value}
Write: Anytime
Access: User read/write¹
1
0
PB1
PB0
0
0
Field
7-0
PB
Table 2-5. PORTB Register Field Descriptions
Description
Port B general purpose input/output data—Data Register
The associated pin can be used as general purpose I/O. In general purpose output mode the register bit value is
driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
S12XS Family Reference Manual, Rev. 1.13
Freescale Semiconductor
75