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S9S12XS256J0CAL Datasheet, PDF (367/738 Pages) Freescale Semiconductor, Inc – Microcontrollers | |||
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Pulse-Width Modulator (S12PWM8B8CV1)
13.2.1 PWM7 â PWM Channel 7
This pin serves as waveform output of PWM channel 7 and as an input for the emergency shutdown
feature.
13.2.2 PWM6 â PWM Channel 6
This pin serves as waveform output of PWM channel 6.
13.2.3 PWM5 â PWM Channel 5
This pin serves as waveform output of PWM channel 5.
13.2.4 PWM4 â PWM Channel 4
This pin serves as waveform output of PWM channel 4.
13.2.5 PWM3 â PWM Channel 3
This pin serves as waveform output of PWM channel 3.
13.2.6 PWM3 â PWM Channel 2
This pin serves as waveform output of PWM channel 2.
13.2.7 PWM3 â PWM Channel 1
This pin serves as waveform output of PWM channel 1.
13.2.8 PWM3 â PWM Channel 0
This pin serves as waveform output of PWM channel 0.
13.3 Memory Map and Register Deï¬nition
This section describes in detail all the registers and register bits in the PWM module.
The special-purpose registers and register bit functions that are not normally available to device end users,
such as factory test control registers and reserved registers, are clearly identiï¬ed by means of shading the
appropriate portions of address maps and register diagrams. Notes explaining the reasons for restricting
access to the registers and functions are also explained in the individual register descriptions.
13.3.1 Module Memory Map
This section describes the content of the registers in the PWM module. The base address of the PWM
module is determined at the MCU level when the MCU is deï¬ned. The register decode map is ï¬xed and
begins at the ï¬rst address of the module address offset. The ï¬gure below shows the registers associated
S12XS Family Reference Manual, Rev. 1.13
Freescale Semiconductor
367
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