S9S12XS256J0CAL Datasheet, PDF (81/738 Pages) Freescale Semiconductor, Inc – Microcontrollers

Port Integration Module (S12XSPIMV1)
Table 2-11. RDRIV Register Field Descriptions (continued)
Field
1
RDPB
Description
Port B reduced drive—Select reduced drive for output port
This bit configures the drive strength of all associated port output pins as either full or reduced. If a pin is used as
input this bit has no effect. The reduced drive function is independent of which function is being used on a particular
pin.
0
RDPA
1 Reduced drive selected (approx. 1/5 of the full drive strength)
0 Full drive strength enabled
Port A reduced drive—Select reduced drive for output port
This bit configures the drive strength of all associated port output pins as either full or reduced. If a pin is used as
input this bit has no effect. The reduced drive function is independent of which function is being used on a particular
pin.
1 Reduced drive selected (approx. 1/5 of the full drive strength)
0 Full drive strength enabled
2.3.12 ECLK Control Register (ECLKCTL)
Address 0x001C (PRR)
R
W
Reset:
Special
single-chip
Normal
single-chip
7
NECLK
Mode
Depen-
dent
0
1
1 _{Read: Anytime}
Write: Anytime
6
NCLKX2
5
DIV16
4
EDIV4
3
EDIV3
2
EDIV2
1
0
0
0
0
1
0
0
0
0
1
0
0
0
0
= Unimplemented or Reserved
Figure 2-10. ECLK Control Register (ECLKCTL)
Access: User read/write¹
1
0
EDIV1
EDIV0
0
0
0
0
0
0
S12XS Family Reference Manual, Rev. 1.13
Freescale Semiconductor
81