S9S12XS256J0CAL Datasheet, PDF (117/738 Pages) Freescale Semiconductor, Inc – Microcontrollers

2.3.67 Port AD0 Data Register 1 (PT1AD0)
Port Integration Module (S12XSPIMV1)
Address 0x0271
7
R
PT1AD07
W
6
PT1AD06
5
PT1AD05
4
PT1AD04
3
PT1AD03
2
PT1AD02
Altern.
Function
AN7
AN6
AN5
AN4
AN3
AN2
Reset
0
0
0
0
0
0
Figure 2-65. Port AD0 Data Register 1 (PT1AD0)
1 _{Read: Anytime, the data source depends on the data direction value}
Write: Anytime
Access: User read/write¹
1
0
PT1AD01 PT1AD00
AN1
AN0
0
0
Table 2-64. PT1AD0 Register Field Descriptions
Field
Description
7-0
PT1AD0
Port AD0 general purpose input/output data—Data Register, ATD AN analog input
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
2.3.68 Port AD0 Data Direction Register 0 (DDR0AD0)
Address 0x0272
Access: User read/write¹
7
R
DDR0AD07
W
6
DDR0AD06
5
DDR0AD05
4
DDR0AD04
3
DDR0AD03
2
DDR0AD02
1
DDR0AD01
0
DDR0AD00
Reset
0
0
0
0
0
0
0
0
1 _{Read: Anytime}
Write: Anytime
Figure 2-66. Port AD0 Data Direction Register 0 (DDR0AD0)
Table 2-65. DDR0AD0 Register Field Descriptions
Field
Description
7-0 Port AD0 data direction—
DDR0AD0 This bit determines whether the associated pin is an input or output.
To use the digital input function the ATD Digital Input Enable Register (ATD0DIEN) has to be set to logic level “1”.
1 Associated pin configured as output
0 Associated pin configured as input
S12XS Family Reference Manual, Rev. 1.13
Freescale Semiconductor
117