S9S12XS256J0CAL Datasheet, PDF (669/738 Pages) Freescale Semiconductor, Inc – Microcontrollers

Electrical Characteristics
Table A-8. 5-V I/O Characteristics
Conditions are 4.5 V < V_DD35 < 5.5 V junction temperature from –40°C to +150°C, unless otherwise noted
I/O Characteristics for all I/O pins except EXTAL, XTAL,TEST and supply pins.
16 D Port H, J, P interrupt input pulse passed (STOP)
t_PULSE
4
17 D IRQ pulse width, edge-sensitive mode (STOP)
PW_IRQ
1
18 D XIRQ pulse width with X-bit set (STOP)
PW_XIRQ
4
1 ^{Maximum leakage current occurs at maximum operating temperature.}
2 ^{Refer to Section A.1.4, “Current Injection” for more details}
3 ^{Parameter only applies in stop or pseudo stop mode.}
—
—
tcyc
—
—
tcyc
—
—
tosc
A.1.10 Supply Currents
This section describes the current consumption characteristics of the device as well as the conditions for
the measurements.
A.1.10.1 Typical Run Current Measurement Conditions
Since the current consumption of the output drivers is load dependent, all measurements are without output
loads and with minimum I/O activity. The currents are measured in single chip mode, S12XCPU code is
executed from Flash. V_DD35=5V, internal voltage regulator is enabled and the bus frequency is 40MHz
using a 4MHz oscillator in loop controlled Pierce mode.
Since the DBG and BDM modules are typically not used in the end application, the supply current values
for these modules is not specified.
An overhead of current consumption exists independent of the listed modules, due to voltage regulation
and clock logic that is not dedicated to a specific module. This is listed in the table row named “overhead”.
Table A-9 shows the configuration of the peripherals for typical run current.
Table A-9. Module Configurations for Typical Run Supply (VDDR+VDDA) Current V_DD35=5V
Peripheral
Configuration
S12XCPU
MSCAN
SPI
SCI
PWM
TIM
ATD
Overhead
420 cycle loop: 384 DBNE cycles plus subroutine entry to stimulate stacking (RAM access)
Configured to loop-back mode using a bit rate of 500kbit/s
Configured to master mode, continuously transmit data (0x55 or 0xAA) at 2Mbit/s
Configured into loop mode, continuously transmit data (0x55) at speed of 19200 baud
Configured to toggle its pins at the rate of 1kHz
The peripheral shall be configured in output compare mode. Pulse accumulator and modulus
counter enabled.
The peripheral is configured to operate at its maximum specified
frequency and to continuously convert voltages on all input channels in sequence.
VREG supplying 1.8V from a 5V input voltage, PLL on
A.1.10.2 Maximum Run Current Measurement Conditions
Currents are measured in single chip mode, S12XCPU with V_DD35=5.5V, internal voltage regulator
enabled and a 40MHz bus frequency from a 4MHz input. Characterized parameters are derived using a
S12XS Family Reference Manual, Rev. 1.13
Freescale Semiconductor
669