S9S12XS256J0CAL Datasheet, PDF (67/738 Pages) Freescale Semiconductor, Inc – Microcontrollers

Port Integration Module (S12XSPIMV1)
Table 2-2. Block Memory Map (continued)
Port
Offset or
Address
Register
Access Reset Value Section/Page
H 0x0260 PTH—Port H Data Register
R/W
0x0261 PTIH—Port H Input Register
R
0x0262 DDRH—Port H Data Direction Register
R/W
0x0263 RDRH—Port H Reduced Drive Register
R/W
0x0264 PERH—Port H Pull Device Enable Register
R/W
0x0265 PPSH—Port H Polarity Select Register
R/W
0x0266 PIEH—Port H Interrupt Enable Register
R/W
0x0267 PIFH—Port H Interrupt Flag Register
R/W
J 0x0268 PTJ—Port J Data Register
R/W
0x0269 PTIJ—Port J Input Register
R
0x026A DDRJ—Port J Data Direction Register
R/W
0x026B RDRJ—Port J Reduced Drive Register
R/W
0x026C PERJ—Port J Pull Device Enable Register
R/W
0x026D PPSJ—Port J Polarity Select Register
R/W
0x026E PIEJ—Port J Interrupt Enable Register
R/W
0x026F PIFJ—Port J Interrupt Flag Register
R/W
AD 0x0270 PT0AD0—Port AD0 Data Register 0
R/W
0x0271 PT1AD0—Port AD0 Data Register 1
R/W
0x0272 DDR0AD0—Port AD0 Data Direction Register 0
R/W
0x0273 DDR1AD0—Port AD0 Data Direction Register 1
R/W
0x0274 RDR0AD0—Port AD0 Reduced Drive Register 0
R/W
0x0275 RDR1AD0—Port AD0 Reduced Drive Register 1
R/W
0x0276 PER0AD0—Port AD0 Pull Up Enable Register 0
R/W
0x0277 PER1AD0—Port AD0 Pull Up Enable Register 1
R/W
0x0278 PIM Reserved
R
:
0x027F
1 _{Write access not applicable for one or more register bits. Refer to register description.}
2 _{Refer to memory map in SoC Guide to determine related module.}
3 _{Mode dependent.}
4 _{Read always returns logic level on pins.}
0x00
4
0x00
0x00
0x00
0x00
0x00
0x00
0x00
4
0x00
0x00
0xFF
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
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S12XS Family Reference Manual, Rev. 1.13
Freescale Semiconductor
67