S9S12XS256J0CAL Datasheet, PDF (231/738 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 7
Security (S12XS9SECV2)
Version
Number
02.00
02.01
02.02
Revision
Date
27 Aug
2004
21 Feb
2007
19 Apr
2007
Effective
Date
08 Sep
2004
21 Feb
2007
19 Apr
2007
Table 7-1. Revision History
Author
Description of Changes
reviewed and updated for S12XD architecture
added S12XE, S12XF and S12XS architectures
corrected statement about Backdoor key access via BDM on XE, XF,
XS
7.1 Introduction
This specification describes the function of the security mechanism in the S12XS chip family (9SEC).
NOTE
No security feature is absolutely secure. However, Freescale’s strategy is to
make reading or copying the FLASH and/or EEPROM difficult for
unauthorized users.
7.1.1 Features
The user must be reminded that part of the security must lie with the application code. An extreme example
would be application code that dumps the contents of the internal memory. This would defeat the purpose
of security. At the same time, the user may also wish to put a backdoor in the application program. An
example of this is the user downloads a security key through the SCI, which allows access to a
programming routine that updates parameters stored in another section of the Flash memory.
The security features of the S12XS chip family (in secure mode) are:
• Protect the content of non-volatile memories (Flash, EEPROM)
• Execution of NVM commands is restricted
• Disable access to internal memory via background debug module (BDM)
Table 7-2 gives an overview over availability of security relevant features in unsecure and secure modes.
Table 7-2. Feature Availability in Unsecure and Secure Modes on S12XS
Unsecure Mode
Secure Mode
Flash Array Access
NS SS NX ES EX ST NS SS NX ES EX ST
✔✔
✔✔
S12XS Family Reference Manual, Rev. 1.13
Freescale Semiconductor
231