S9S12XS256J0CAL Datasheet, PDF (234/738 Pages) Freescale Semiconductor, Inc – Microcontrollers

Security (S12XS9SECV2)
7.1.4.1 Normal Single Chip Mode (NS)
• Background debug module (BDM) operation is completely disabled.
• Execution of Flash and EEPROM commands is restricted. Please refer to the NVM block guide for
details.
• Tracing code execution using the DBG module is disabled.
7.1.4.2 Special Single Chip Mode (SS)
• BDM firmware commands are disabled.
• BDM hardware commands are restricted to the register space.
• Execution of Flash and EEPROM commands is restricted. Please refer to the NVM block guide for
details.
• Tracing code execution using the DBG module is disabled.
Special single chip mode means BDM is active after reset. The availability of BDM firmware commands
depends on the security state of the device. The BDM secure firmware first performs a blank check of both
the Flash memory and the EEPROM. If the blank check succeeds, security will be temporarily turned off
and the state of the security bits in the appropriate Flash memory location can be changed If the blank
check fails, security will remain active, only the BDM hardware commands will be enabled, and the
accessible memory space is restricted to the peripheral register area. This will allow the BDM to be used
to erase the EEPROM and Flash memory without giving access to their contents. After erasing both Flash
memory and EEPROM, another reset into special single chip mode will cause the blank check to succeed
and the options/security byte can be programmed to “unsecured” state via BDM.
While the BDM is executing the blank check, the BDM interface is completely blocked, which means that
all BDM commands are temporarily blocked.
S12XS Family Reference Manual, Rev. 1.13
234
Freescale Semiconductor