S9S12XS256J0CAL Datasheet, PDF (124/738 Pages) Freescale Semiconductor, Inc – Microcontrollers

Port Integration Module (S12XSPIMV1)
Port E pin PE[1] can be used for either general-purpose input or as the level- or falling edge-sensitive IRQ
interrupt input. IRQ will be enabled by setting the IRQEN configuration bit (2.3.14/2-83) and clearing the
I-bit in the CPU condition code register. It is inhibited at reset so this pin is initially configured as a simple
input with a pull-up.
Port E pin PE[0] can be used for either general-purpose input or as the level-sensitive XIRQ interrupt input.
XIRQ can be enabled by clearing the X-bit in the CPU condition code register. It is inhibited at reset so
this pin is initially configured as a high-impedance input with a pull-up.
2.4.3.4 Port K
Port K pins PK[7,5:0] can be used for general-purpose I/O.
2.4.3.5 Port T
This port is associated with TIM and PWM.
Port T pins PT[7:4] can be used for either general-purpose I/O, or with the PWM or with the channels of
the standard Timer subsystem.
Port T pins PT[3:0] can be used for either general-purpose I/O, or with the channels of the standard Timer
subsystem.
The TIM pins IOC2-0 can be re-routed.
2.4.3.6 Port S
This port is associated with SPI0, SCI0 and SCI1.
Port S pins PS[7:4] can be used either for general-purpose I/O, or with the SPI0 subsystem.
Port S pins PS[3:2] can be used either for general-purpose I/O, or with the SCI1 subsystem.
Port S pins PS[1:0] can be used either for general-purpose I/O, or with the SCI0 subsystem.
The SPI0 and SCI1 pins can be re-routed.
2.4.3.7 Port M
This port is associated with CAN0 and SCI1.
Port M pins PM[7:6] can be used for either general purpose I/O.
Port M pins PM[1:0] can be used for either general purpose I/O, or with the CAN0 or with the SCI1
subsystem.
Port M pins PM[5:2] can be used for general purpose I/O.
2.4.3.8 Port P
This port is associated with the PWM, TIM and SCI1.
S12XS Family Reference Manual, Rev. 1.13
124
Freescale Semiconductor