S9S12XS256J0CAL Datasheet, PDF (24/738 Pages) Freescale Semiconductor, Inc – Microcontrollers

Device Overview S12XS Family
1.1.3 Block Diagram
Figure 1-1 shows a block diagram of the S12XS Family devices
VDDR
VDD
VDDF
VDDPLL
BKGD
EXTAL
XTAL
RESET
TEST
PE0
PE1
PE2
PE3
PE4
PE5
PE6
PE7
PA[7:0]
PB[7:0]
64, 128, 256 Kbytes Flash
4, 8, 12 Kbytes RAM
ATD
8/10/12-bit 16-channel
Analog-Digital Converter
4, 8 Kbytes Data Flash
AN[15:0]
Voltage Regulator
CPU12X
Debug Module
Single-wire Background 4 address breakpoints
Debug Module
2 data breakpoints
512 Byte Trace Buffer
Amplitude Controlled
Low Power Pierce or
Full drive Pierce
Oscillator
PLL with Frequency
Modulation option
Clock Monitor
COP Watchdog
Periodic Interrupt
Async. Periodic Int.
PIT
4ch 24-bit Timer
Reset Generation
and Test Entry
Multilevel
Interrupt Module
XIRQ
IRQ
TIM
16-bit 8 channel
Timer
IOC0
IOC1
IOC2
IOC3
IOC4
IOC5
IOC6
IOC7
PWM
8-bit 8 channel
Pulse Width Modulator
PWM0
PWM1
PWM2
PWM3
PWM4
PWM5
PWM6
PWM7
CAN0
msCAN 2.0B
RXCAN
TXCAN
ECLK
XCLKS/ECLKX2
SCI0
Asynchronous Serial IF
SCI1
Asynchronous Serial IF
SPI0
Synchronous Serial IF
RXD
TXD
RXD
TXD
MISO
MOSI
SCK
SS
PK[7,5:0]
Figure 1-1. S12XS Family Block Diagram
VDDA
VSSA
VRH
VRL
PAD[15:0]
PT0
PT1
PT2
PT3
PT4
PT5
PT6
PT7
PP0
PP1
PP2
PP3
PP4
PP5
PP6
PP7
PM0
PM1
PM2
PM3
PM4
PM5
PM6
PM7
PS0
PS1
PS2
PS3
PS4
PS5
PS6
PS7
PH0
PH1
PH2
PH3
PH4
PH5
PH6
PH7
PJ0
PJ1
PJ6
PJ7
S12XS Family Reference Manual, Rev. 1.13
24
Freescale Semiconductor