S9S12XS256J0CAL Datasheet, PDF (105/738 Pages) Freescale Semiconductor, Inc – Microcontrollers

2.3.44 Port P Data Direction Register (DDRP)
Port Integration Module (S12XSPIMV1)
Address 0x025A
R
W
Reset
7
DDRP7
0
1 _{Read: Anytime}
Write: Anytime
6
DDRP6
5
DDRP5
4
DDRP4
3
DDRP3
2
DDRP2
0
0
0
0
0
Figure 2-42. Port P Data Direction Register (DDRP)
Access: User read/write¹
1
0
DDRP1
DDRP0
0
0
Table 2-41. DDRP Register Field Descriptions
Field
7
DDRP
Description
Port P data direction—
This bit determines whether the associated pin is an input or output.
The PWM forces the I/O state to be an output for an enabled channel. If the PWM shutdown feature is enabled this
pin is forced to be an input. In this case the data direction bit will not change.
6-3
DDRP
1 Associated pin configured as output
0 Associated pin configured as input
Port P data direction—
This bit determines whether the associated pin is an input or output.
The PWM forces the I/O state to be an output for an enabled channel. In this case the data direction bit will not
change.
2,0
DDRP
1 Associated pin configured as output
0 Associated pin configured as input
Port P data direction—
This bit determines whether the associated pin is an input or output.
The PWM forces the I/O state to be an output for an enabled channel. Else the TIM forces the I/O state to be an
output for a timer port associated with an enabled output compare. Else depending on the configuration of the
enabled SCI the I/O state will be forced to be input or output. In this case the data direction bit will not change.
1
DDRP
1 Associated pin configured as output
0 Associated pin configured as input
Port P data direction—
This bit determines whether the associated pin is an input or output.
The PWM forces the I/O state to be an output for an enabled channel. Else the TIM forces the I/O state to be an
output for a timer port associated with an enabled output compare. In this case the data direction bit will not change.
1 Associated pin configured as output
0 Associated pin configured as input
S12XS Family Reference Manual, Rev. 1.13
Freescale Semiconductor
105