S9S12XS256J0CAL Datasheet, PDF (144/738 Pages) Freescale Semiconductor, Inc – Microcontrollers

Memory Mapping Control (S12XMMCV4)
BDM HARDWARE COMMAND
Global Address [22:0]
Bit22
Bit16 Bit15
Bit0
BDMGPR Register [6:0]
BDM Local Address
Bit22
BDM FIRMWARE COMMAND
Global Address [22:0]
Bit16 Bit15
Bit0
BDMGPR Register [6:0]
CPU Local Address
Figure 3-18. BDMGPR Address Mapping
3.4.2.3 Implemented Memory Map
The global memory spaces reserved for the internal resources (RAM, Data FLASH, and FLASH) are not
determined by the MMC module. Size of the individual internal resources are however fixed in the design
of the device cannot be changed by the user. Please refer to the SoC Guide for further details. Figure 3-19
and Table 3-10 show the memory spaces occupied by the on-chip resources. Please note that the memory
spaces have fixed top addresses.
Table 3-10. Global Implemented Memory Space
Internal Resource
$Address
RAM
RAM_LOW = 0x10_0000 minus RAMSIZE¹
Data FLASH
DF_HIGH = 0x10_0000 plus DFLASHSIZE²
FLASH
FLASH_LOW = 0x80_0000 minus FLASHSIZE³
1 ^{RAMSIZE is the hexadecimal value of RAM SIZE in Bytes}
2 ^{DFLASHSIZE is the hexadecimal value of DFLASH SIZE in Bytes}
3 ^{FLASHSIZE is the hexadecimal value of FLASH SIZE in Bytes}
S12XS Family Reference Manual, Rev. 1.13
144
Freescale Semiconductor