S9S12XS256J0CAL Datasheet, PDF (104/738 Pages) Freescale Semiconductor, Inc – Microcontrollers

Port Integration Module (S12XSPIMV1)
Table 2-39. PTP Register Field Descriptions (continued)
Field
1
PTP
Description
Port P general purpose input/output data—Data Register, PWM output, routed TIM output, pin interrupt
input/output
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
• The PWM function takes precedence over the TIM and general purpose I/O function if the related channel is
enabled.
• The TIM function takes precedence over the general purpose I/O function if the related channel is enabled.
• Pin interrupts can be generated if enabled in input or output mode.
0
Port P general purpose input/output data—Data Register, PWM output, routed TIM output, routed SCI1 RXD
PTP output, pin interrupt input/output
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
• The PWM function takes precedence over the TIM, SCI1 and general purpose I/O function if the related channel
is enabled.
• The TIM function takes precedence over SCI1 and the general purpose I/O function if the related channel is
enabled.
• The SCI1 function takes precedence over the general purpose I/O function if enabled.
• Pin interrupts can be generated if enabled in input or output mode.
2.3.43 Port P Input Register (PTIP)
Address 0x0259
7
R PTIP7
6
PTIP6
5
PTIP5
4
PTIP4
3
PTIP3
2
PTIP2
W
Reset
u
u
u
u
u
u
= Unimplemented or Reserved
u = Unaffected by reset
Figure 2-41. Port P Input Register (PTIP)
1 _{Read: Anytime}
Write:Never, writes to this register have no effect
Access: User read¹
1
PTIP1
0
PTIP0
u
u
Field
7-0
PTIP
Table 2-40. PTIP Register Field Descriptions
Description
Port P input data—
A read always returns the buffered input state of the associated pin. It can be used to detect overload or short circuit
conditions on output pins.
S12XS Family Reference Manual, Rev. 1.13
104
Freescale Semiconductor