S9S12XS256J0CAL Datasheet, PDF (19/738 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 1
Device Overview S12XS Family
1.1 Introduction
The new S12XS family of 16-bit micro controllers is a compatible, reduced version of the S12XE family.
These families provide an easy approach to develop common platforms from low-end to high-end
applications, minimizing the redesign of software and hardware.
Targeted at generic automotive applications and CAN nodes, some typical examples of these applications
are: Body Controllers, Occupant Detection, Door Modules, RKE Receivers, Smart Actuators, Lighting
Modules and Smart Junction Boxes amongst many others.
The S12XS family retains many of the features of the S12XE family including Error Correction Code
(ECC) on Flash memory, a separate Data-Flash Module for code or data storage, a Frequency Modulated
Locked Loop (IPLL) that improves the EMC performance and a fast ATD converter.
S12XS family delivers 32-bit performance with all the advantages and efficiencies of a 16-bit MCU while
retaining the low cost, power consumption, EMC and code-size efficiency advantages currently enjoyed
by users of Freescale’s existing 16-bit S12 and S12X MCU families. Like members of other S12X
families, the S12XS family runs 16-bit wide accesses without wait states for all peripherals and memories.
The S12XS family is available in 112-pin LQFP, 80-pin QFP, 64-pin LQFP package options and maintains
a high level of pin compatibility with the S12XE family. In addition to the I/O ports available in each
module, up to 18 further I/O ports are available with interrupt capability allowing Wake-Up from stop or
wait modes.
The peripheral set includes MSCAN, SPI, two SCIs, an 8-channel 24-bit periodic interrupt timer, 8-
channel 16-bit Timer, 8-channel PWM and up to 16- channel 12-bit ATD converter.
Software controlled peripheral-to-port routing enables access to a flexible mix of the peripheral modules
in the lower pin count package options.
1.1.1 Features
Features of the S12XS Family are listed here. Please see Table D-1 for memory options and Table D-2 for
the peripheral features that are available on the different family members.
• 16-bit CPU12X
— Upward compatible with S12 instruction set with the exception of five Fuzzy instructions
(MEM, WAV, WAVR, REV, REVW) which have been removed
— Enhanced indexed addressing
— Access to large data segments independent of PPAGE
S12XS Family Reference Manual, Rev. 1.13
Freescale Semiconductor
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