S9S12XS256J0CAL Datasheet, PDF (632/738 Pages) Freescale Semiconductor, Inc – Microcontrollers

64 KByte Flash Module (S12XFTMR64K1V1)
Table 20-24. FCCOB - NVM Command Mode (Typical Usage)
CCOBIX[2:0]
011
100
101
Byte
HI
LO
HI
LO
HI
LO
FCCOB Parameter Fields (NVM Command Mode)
Data 1 [15:8]
Data 1 [7:0]
Data 2 [15:8]
Data 2 [7:0]
Data 3 [15:8]
Data 3 [7:0]
20.3.2.12 Flash Reserved0 Register (FRSV0)
This Flash register is reserved for factory testing.
Offset Module Base + 0x000C
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 20-18. Flash Reserved0 Register (FRSV0)
All bits in the FRSV0 register read 0 and are not writable.
20.3.2.13 Flash Reserved1 Register (FRSV1)
This Flash register is reserved for factory testing.
Offset Module Base + 0x000D
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 20-19. Flash Reserved1 Register (FRSV1)
All bits in the FRSV1 register read 0 and are not writable.
20.3.2.14 Flash ECC Error Results Register (FECCR)
The FECCR registers contain the result of a detected ECC fault for both single bit and double bit faults.
The FECCR register provides access to several ECC related fields as defined by the ECCRIX index bits
in the FECCRIX register (see Section 20.3.2.4). Once ECC fault information has been stored, no other
S12XS Family Reference Manual, Rev. 1.13
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