S9S12XS256J0CAL Datasheet, PDF (76/738 Pages) Freescale Semiconductor, Inc – Microcontrollers

Port Integration Module (S12XSPIMV1)
2.3.5 Port A Data Direction Register (DDRA)
Address 0x0002 (PRR)
7
R
DDRA7
W
6
DDRA6
5
DDRA5
4
DDRA4
3
DDRA3
2
DDRA2
Reset
0
0
0
0
0
0
Figure 2-3. Port A Data Direction Register (DDRA)
1 _{Read: Anytime, the data source depends on the data direction value}
Write: Anytime
Table 2-6. DDRA Register Field Descriptions
Field
7-0
DDRA
Description
Port A Data Direction—
This bit determines whether the associated pin is an input or output.
1 Associated pin configured as output
0 Associated pin configured as input
2.3.6 Port B Data Direction Register (DDRB)
Address 0x0003 (PRR)
7
R
DDRB7
W
6
DDRB6
5
DDRB5
4
DDRB4
3
DDRB3
2
DDRB2
Reset
0
0
0
0
0
0
Figure 2-4. Port B Data Direction Register (DDRB)
1 _{Read: Anytime, the data source depends on the data direction value}
Write: Anytime
Table 2-7. DDRB Register Field Descriptions
Field
7-0
DDRB
Description
Port B Data Direction—
This bit determines whether the associated pin is an input or output.
1 Associated pin configured as output
0 Associated pin configured as input
Access: User read/write¹
1
0
DDRA1
DDRA0
0
0
Access: User read/write¹
1
0
DDRB1
DDRB0
0
0
S12XS Family Reference Manual, Rev. 1.13
76
Freescale Semiconductor