S9S12XS256J0CAL Datasheet, PDF (274/738 Pages) Freescale Semiconductor, Inc – Microcontrollers

Analog-to-Digital Converter (ADC12B16CV1)
10.1.4 Block Diagram of Input structure
ch[4:0] = {SC, CD, CC, CB, CA} bits of ATDCTL5 register
Pin 15
Pin 11
Pin 7
Pin 3
channel 23
channel 19
A/D
channel
MUX
ch[1:0]=11
Pin 14
Pin 10
Pin 6
Pin 2
ch[4:2] = 101 channel 22
ch[4:2] = 100 channel 18
ch[4:2] = 011
ch[4:2] = 010
ch[4:2] = 001
ch[4:2] = 000
ch[1:0]=10
Pin 13
Pin 9
Pin 5
Pin 1
channel 21
channel 17
channel
select
2nd stage
Pin 12
Pin 8
Pin 4
Pin 0
VDDA
channel 20
channel 16
ch[1:0]=01
channel
select
1st stage
sample
to comparator
Rs
~300Ohms
ch[1:0]=00
max: +/-1uA
S/H cap
C1
~6pF
in sum ~4pF
~6pF
VRL
274
VSSA
VSSA
device boundary
Figure 10-2. ADC12B16C Block Diagram of Input Structure
VRL
S12XS Family Reference Manual, Rev. 1.13
Freescale Semiconductor