S9S12XS256J0CAL Datasheet, PDF (39/738 Pages) Freescale Semiconductor, Inc – Microcontrollers

Package Terminal
LQFP QFP LQFP
112 80
64
87
-
-
88
-
-
89
63
50
90
64
51
91
65
52
92
66
53
93
-
-
94
-
-
95
-
-
96
-
-
97
67
54
98
68
-
99
69
-
100 70
55
101 71
56
102 72
57
103 73
58
104 74
59
105 75
60
Pin
PM7
PM6
PS0
PS1
PS2
PS3
PS4
PS5
PS6
PS7
TEST
PJ7
PJ6
PM5
PM4
PM3
PM2
PM1
PM0
Table 1-6. Pin-Out Summary¹ (continued)
Function
2nd
Func.
—
—
RXD0
TXD0
RXD1
TXD1
MISO0
MOSI0
SCK0
SS0
—
KWJ7
KWJ6
SCK0
MOSI0
3rd
Func.
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
4th
Func.
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
SS0
—
—
MISO0
—
—
TXCAN0 TXD1
—
RXCAN0 RXD1
—
5th
Func.
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Power
Supply
Internal Pull
Resistor
CTRL
Reset
State
Description
V_DDX
V_DDX
V_DDX
V_DDX
V_DDX
V_DDX
V_DDX
V_DDX
V_DDX
V_DDX
N.A.
V_DDX
V_DDX
V_DDX
V_DDX
V_DDX
V_DDX
V_DDX
V_DDX
PERM/PPSM Disabled Port M I/O
PERM/PPSM Disabled Port M I/O
PERS/PPSS
Up
Port S I/O, RXD of SCI0
PERS/PPSS
Up
Port S I/O, TXD of SCI0
PERS/PPSS
Up
Port S I/O, RXD of SCI1
PERS/PPSS
Up
Port S I/O, TXD of SCI1
PERS/PPSS
Up
Port S I/O, MISO of SPI0
PERS/PPSS
Up
Port S I/O, MOSI of SPI0
PERS/PPSS
Up
Port S I/O, SCK of SPI0
PERS/PPSS
Up
Port S I/O, SS of SPI0
RESET pin DOWN Test input
PERJ/PPSJ
Up
Port J I/O, interrupt
PERJ/PPSJ
Up
Port J I/O, interrupt
PERM/PPSM Disabled Port M I/O, SCK of SPI0
PERM/PPSM Disabled Port M I/O, MOSI of
SPI0
PERM/PPSM Disabled Port M I/O, SS of SPI0
PERM/PPSM Disabled Port M I/O, MISO of
SPI0
PERM/PPSM Disabled Port M I/O, TX of CAN0,
TXD of SCI1
PERM/PPSM Disabled Port M I/O, RX of CAN0,
RXD of SCI1