S9S12XS256J0CAL Datasheet, PDF (95/738 Pages) Freescale Semiconductor, Inc – Microcontrollers

2.3.31 Port S Polarity Select Register (PPSS)
Port Integration Module (S12XSPIMV1)
Address 0x024C
R
W
Reset
7
PPSS7
0
1 _{Read: Anytime}
Write: Anytime
6
PPSS6
5
PPSS5
4
PPSS4
3
PPSS3
2
PPSS2
0
0
0
0
0
Figure 2-29. Port S Polarity Select Register (PPSS)
Access: User read/write¹
1
0
PPSS1
PPSS0
0
0
Table 2-28. PPSS Register Field Descriptions
Field
7-0
PPSS
Description
Port S pull device select—Configure pull device polarity on input pin
This bit selects a pull-up or a pull-down device if enabled on the associated port input pin.
1 A pull-down device selected
0 A pull-up device selected
2.3.32 Port S Wired-Or Mode Register (WOMS)
Address 0x024C
R
W
Reset
7
WOMS7
0
1 _{Read: Anytime}
Write: Anytime
6
WOMS6
5
WOMS5
4
WOMS4
3
WOMS3
2
WOMS2
0
0
0
0
0
Figure 2-30. Port S Wired-Or Mode Register (WOMS)
Access: User read/write¹
1
0
WOMS1
WOMS0
0
0
Table 2-29. WOMS Register Field Descriptions
Field
Description
7-0
WOMS
Port S wired-or mode—Enable open-drain functionality on output pin
This bit configures an output pin as wired-or (open-drain) or push-pull independent of the function used on the pins.
In wired-or mode a logic “0” is driven active low while a logic “1” remains undriven. This allows a multipoint
connection of several serial modules. The bit has no influence on pins used as input.
1 Output buffer operates as open-drain output.
0 Output buffer operates as push-pull output.
S12XS Family Reference Manual, Rev. 1.13
Freescale Semiconductor
95