S9S12XS256J0CAL Datasheet, PDF (267/738 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 9
Pierce Oscillator (S12XOSCLCPV2)
Table 9-1. Revision History
Revision
Number
V01.05
V02.00
Revision
Date
19 Jul 2006
04 Aug 2006
Sections
Affected
Description of Changes
- All xclks info was removed
- Incremented revision to match the design system spec revision
9.1 Introduction
The Pierce oscillator (XOSC) module provides a robust, low-noise and low-power clock source. The
module will be operated from the V_DDPLL supply rail (1.8 V nominal) and require the minimum number
of external components. It is designed for optimal start-up margin with typical crystal oscillators.
9.1.1 Features
The XOSC will contain circuitry to dynamically control current gain in the output amplitude. This ensures
a signal with low harmonic distortion, low power and good noise immunity.
• High noise immunity due to input hysteresis
• Low RF emissions with peak-to-peak swing limited dynamically
• Transconductance (gm) sized for optimum start-up margin for typical oscillators
• Dynamic gain control eliminates the need for external current limiting resistor
• Integrated resistor eliminates the need for external bias resistor in loop controlled Pierce mode.
• Low power consumption:
— Operates from 1.8 V (nominal) supply
— Amplitude control limits power
• Clock monitor
9.1.2 Modes of Operation
Two modes of operation exist:
1. Loop controlled Pierce (LCP) oscillator
2. External square wave mode featuring also full swing Pierce (FSP) without internal bias resistor
The oscillator mode selection is described in the Device Overview section, subsection Oscillator
Configuration.
S12XS Family Reference Manual, Rev. 1.13
Freescale Semiconductor
267