S9S12XS256J0CAL Datasheet, PDF (77/738 Pages) Freescale Semiconductor, Inc – Microcontrollers

2.3.7 PIM Reserved Registers
Address 0x0004 (PRR) to 0x0007 (PRR)
7
6
5
4
3
R
0
0
0
0
0
W
Reset
0
0
0
0
0
= Unimplemented or Reserved
1 _{Read: Always reads 0x00}
Write: Unimplemented
Figure 2-5. PIM Reserved Registers
Port Integration Module (S12XSPIMV1)
Access: User read¹
2
1
0
0
0
0
0
0
0
2.3.8 Port E Data Register (PORTE)
Address 0x0008 (PRR)
Access: User read/write¹
7
R
PE7
W
6
PE6
5
PE5
4
PE4
3
PE3
2
PE2
1
PE1
0
PE0
Altern.
Function
XCLKS
—
—
ECLK
—
—
IRQ
XIRQ
ECLKX2
—
—
—
—
—
—
—
Reset
0
0
0
0
0
0
—²
—²
= Unimplemented or Reserved
Figure 2-6. Port E Data Register (PORTE)
1 _{Read: Anytime, the data source depends on the data direction value}
Write: Anytime
2 _{These registers are reset to zero. Two bus clock cycles after reset release the register values are updated with the associated}
pin values.
S12XS Family Reference Manual, Rev. 1.13
Freescale Semiconductor
77