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S9S12XS256J0CAL Datasheet, PDF (130/738 Pages) Freescale Semiconductor, Inc – Microcontrollers | |||
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Memory Mapping Control (S12XMMCV4)
BDM
MMC
Address Decoder & Priority
CPU
Target Bus Controller
DBG
Data FLASH PGMFLASH
RAM
Peripherals
Figure 3-1. MMC Block Diagram
3.2 External Signal Description
The user is advised to refer to the SoC Guide for port conï¬guration and location of external bus signals.
Some pins may not be bonded out in all implementations.
Table 3-2 outlines the pin names and functions. It also provides a brief description of their operation.
Table 3-2. External Input Signals Associated with the MMC
Signal
I/O
MODC
I
Description
Mode input
Availability
Latched after
RESET (active low)
S12XS Family Reference Manual, Rev. 1.13
130
Freescale Semiconductor
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