S9S12XS256J0CAL Datasheet, PDF (106/738 Pages) Freescale Semiconductor, Inc – Microcontrollers

Port Integration Module (S12XSPIMV1)
2.3.45 Port P Reduced Drive Register (RDRP)
Address 0x025B
R
W
Reset
7
RDRP7
0
1 _{Read: Anytime}
Write: Anytime
6
RDRP6
5
RDRP5
4
RDRP4
3
RDRP3
2
RDRP2
0
0
0
0
0
Figure 2-43. Port P Reduced Drive Register (RDRP)
Access: User read/write¹
1
0
RDRP1
RDRP0
0
0
Table 2-42. RDRP Register Field Descriptions
Field
7-0
RDRP
Description
Port P reduced drive—Select reduced drive for output pin
This bit configures the drive strength of the associated output pin as either full or reduced. If a pin is used as input
this bit has no effect. The reduced drive function is independent of which function is being used on a particular pin.
1 Reduced drive selected (approx. 1/5 of the full drive strength)
0 Full drive strength enabled
2.3.46 Port P Pull Device Enable Register (PERP)
Address 0x025C
R
W
Reset
7
PPSP7
0
1 _{Read: Anytime}
Write: Anytime
6
PPSP6
5
PPSP5
4
PPSP4
3
PPSP3
2
PPSP2
0
0
0
0
0
Figure 2-44. Port P Pull Device Enable Register (PERP)
Access: User read/write¹
1
0
PPSP1
PPSP0
0
0
Table 2-43. PERP Register Field Descriptions
Field
7-0
PERP
Description
Port P pull device enable—Enable pull device on input pin
This bit controls whether a pull device on the associated port input pin is active. If a pin is used as output this bit has
no effect. The polarity is selected by the related polarity select register bit.
1 Pull device enabled
0 Pull device disabled
S12XS Family Reference Manual, Rev. 1.13
106
Freescale Semiconductor