S9S12XS256J0CAL Datasheet, PDF (122/738 Pages) Freescale Semiconductor, Inc – Microcontrollers

Port Integration Module (S12XSPIMV1)
NOTE
Due to internal synchronization circuits, it can take up to 2 bus clock cycles
until the correct value is read on port data or port input registers, when
changing the data direction register.
PTI
0
1
PT
0
1
PIN
DDR
0
1
data out
Module _{output enable}
module enable
Figure 2-73. Illustration of I/O pin functionality
2.4.2.4 Reduced drive register (RDRx)
If the pin is used as an output this register allows the configuration of the drive strength independent of the
use with a peripheral module.
2.4.2.5 Pull device enable register (PERx)
This register turns on a pull-up or pull-down device on the related pins determined by the associated
polarity select register (2.4.2.5/2-122).
The pull device becomes active only if the pin is used as an input or as a wired-or output. Some peripheral
modules only allow certain configurations of pull devices to become active. Refer to the respective bit
descriptions.
2.4.2.6 Polarity select register (PPSx)
This register selects either a pull-up or pull-down device if enabled.
It only becomes active if the pin is used as an input. A pull-up device can be activated if the pin is used as
a wired-or output.
S12XS Family Reference Manual, Rev. 1.13
122
Freescale Semiconductor