S9S12XS256J0CAL Datasheet, PDF (113/738 Pages) Freescale Semiconductor, Inc – Microcontrollers

2.3.59 Port J Input Register (PTIJ)
Port Integration Module (S12XSPIMV1)
Address 0x0269
7
6
5
4
3
2
R PTIJ7
PTIJ6
0
0
0
0
W
Reset
u
u
u
u
u
u
= Unimplemented or Reserved
u = Unaffected by reset
Figure 2-57. Port J Input Register (PTIJ)
1 _{Read: Anytime}
Write:Never, writes to this register have no effect
Access: User read¹
1
PTIJ1
0
PTIJ0
u
u
Table 2-56. PTIJ Register Field Descriptions
Field
Description
7-6, 1-0
PTIJ
Port J input data—
A read always returns the buffered input state of the associated pin. It can be used to detect overload or short circuit
conditions on output pins.
2.3.60 Port J Data Direction Register (DDRJ)
Address 0x026A
R
W
Reset
7
DDRJ7
0
1 _{Read: Anytime}
Write: Anytime
6
5
4
3
2
0
0
0
0
DDRJ6
0
0
0
0
0
Figure 2-58. Port J Data Direction Register (DDRJ)
Table 2-57. DDRJ Register Field Descriptions
Field
Description
7-6, 1-0 Port J data direction—
DDRJ This bit determines whether the associated pin is an input or output.
1 Associated pin configured as output
0 Associated pin configured as input
Access: User read/write¹
1
0
DDRJ1
DDRJ0
0
0
S12XS Family Reference Manual, Rev. 1.13
Freescale Semiconductor
113