S9S12XS256J0CAL Datasheet, PDF (483/738 Pages) Freescale Semiconductor, Inc – Microcontrollers

Timer Module (TIM16B8CV2)
Table 16-23. PTPSR Field Descriptions
Field
Description
7:0
PTPS[7:0]
Precision Timer Prescaler Select Bits — These eight bits specify the division rate of the main Timer prescaler.
These are effective only when the PRNT bit of TSCR1 is set to 1. Table 16-24 shows some selection examples
in this case.
The newly selected prescale factor will not take effect until the next synchronized edge where all prescale counter
stages equal zero.
The Prescaler can be calculated as follows depending on logical value of the PTPS[7:0] and PRNT bit:
PRNT = 1 : Prescaler = PTPS[7:0] + 1
PTPS7
0
0
0
0
0
0
0
0
0
0
0
0
1
Table 16-24. Precision Timer Prescaler Selection Examples when PRNT = 1
PTPS6
0
0
0
0
0
0
0
0
0
0
0
1
1
PTPS5
0
0
0
0
0
0
0
0
0
0
1
1
1
PTPS4
0
0
0
0
0
0
0
0
0
1
1
1
1
PTPS3
0
0
0
0
0
0
0
0
1
1
1
1
1
PTPS2
0
0
0
0
1
1
1
1
1
1
1
1
1
PTPS1
0
0
1
1
0
0
1
1
1
1
1
1
1
PTPS0
0
1
0
1
0
1
0
1
1
1
1
1
1
Prescale
Factor
1
2
3
4
5
6
7
8
16
32
64
128
256
16.4 Functional Description
This section provides a complete functional description of the timer TIM16B8CV2 block. Please refer to
the detailed timer block diagram in Figure 16-30 as necessary.
S12XS Family Reference Manual Rev. 1.13
Freescale Semiconductor
483