S9S12XS256J0CAL Datasheet, PDF (445/738 Pages) Freescale Semiconductor, Inc – Microcontrollers

Serial Peripheral Interface (S12SPIV5)
Table 15-9. SPIF Interrupt Flag Clearing Sequence
XFRW Bit
SPIF Interrupt Flag Clearing Sequence
0
Read SPISR with SPIF == 1 _then
Read SPIDRL
1
Read SPISR with SPIF == 1
Byte Read SPIDRL ¹
or
then Byte Read SPIDRH ² Byte Read SPIDRL
or
Word Read (SPIDRH:SPIDRL)
1 ^{Data in SPIDRH is lost in this case.}
2 ^{SPIDRH can be read repeatedly without any effect on SPIF. SPIF Flag is cleared only by the read}
of SPIDRL after reading SPISR with SPIF == 1.
Table 15-10. SPTEF Interrupt Flag Clearing Sequence
XFRW Bit
SPTEF Interrupt Flag Clearing Sequence
0
Read SPISR with SPTEF == 1 _then
Write to SPIDRL ¹
1 Read SPISR with SPTEF == 1
Byte Write to SPIDRL ¹²
or
then Byte Write to SPIDRH ¹³ Byte Write to SPIDRL ¹
or
Word Write to (SPIDRH:SPIDRL) ¹
1 ^{Any write to SPIDRH or SPIDRL with SPTEF == 0 is effectively ignored.}
2 ^{Data in SPIDRH is undefined in this case.}
3 ^{SPIDRH can be written repeatedly without any effect on SPTEF. SPTEF Flag is cleared only by}
writing to SPIDRL after reading SPISR with SPTEF == 1.
S12XS Family Reference Manual, Rev. 1.13
Freescale Semiconductor
445