S9S12XS256J0CAL Datasheet, PDF (92/738 Pages) Freescale Semiconductor, Inc – Microcontrollers

Port Integration Module (S12XSPIMV1)
Table 2-23. PTS Register Field Descriptions (continued)
Field
3
PTS
2
PTS
1
PTS
0
PTS
Description
Port S general purpose input/output data—Data Register, SCI1 TXD output
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
• The SCI1 function takes precedence over the general purpose I/O function if enabled.
Port S general purpose input/output data—Data Register, SCI1 RXD input
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
• The SCI1 function takes precedence over the general purpose I/O function if enabled.
Port S general purpose input/output data—Data Register, SCI0 TXD output
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
• The SCI0 function takes precedence over the general purpose I/O function if enabled.
Port S general purpose input/output data—Data Register, SCI0 RXD input
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
• The SCI0 function takes precedence over the general purpose I/O function if enabled.
2.3.27 Port S Input Register (PTIS)
Address 0x0249
7
R PTIS7
6
PTIS6
5
PTIS5
4
PTIS4
3
PTIS3
2
PTIS2
W
Reset
u
u
u
u
u
u
= Unimplemented or Reserved
u = Unaffected by reset
Figure 2-25. Port S Input Register (PTIS)
1 _{Read: Anytime}
Write:Never, writes to this register have no effect
Access: User read¹
1
PTIS1
0
PTIS0
u
u
S12XS Family Reference Manual, Rev. 1.13
92
Freescale Semiconductor