S9S12XS256J0CAL Datasheet, PDF (121/738 Pages) Freescale Semiconductor, Inc – Microcontrollers

Port Integration Module (S12XSPIMV1)
2.4.2 Registers
A set of configuration registers is common to all ports with exception of the ATD port (Table 2-71). All
registers can be written at any time, however a specific configuration might not become active.
For example selecting a pull-up device: This device does not become active while the port is used as a
push-pull output.
Table 2-71. Register availability per port¹
Port Data
Input
Data Reduced Pull
Direction Drive Enable
Polarity
Select
A
yes
-
yes
yes
yes
-
B
yes
-
yes
-
E
yes
-
yes
-
K
yes
-
yes
-
T
yes
yes
yes
yes
yes
yes
S
yes
yes
yes
yes
yes
yes
M
yes
yes
yes
yes
yes
yes
P
yes
yes
yes
yes
yes
yes
H
yes
yes
yes
yes
yes
yes
J
yes
yes
yes
yes
yes
yes
AD
yes
-
yes
yes
yes
-
1 _{Each cell represents one register with individual configuration bits}
Wired- Interrupt Interrupt
Or Mode Enable Flag
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
yes
-
-
yes
-
-
-
yes
yes
-
yes
yes
-
yes
yes
-
-
-
Routing
-
-
-
-
yes
-
yes
-
-
-
-
2.4.2.1 Data register (PORTx, PTx)
This register holds the value driven out to the pin if the pin is used as a general purpose I/O.
Writing to this register has only an effect on the pin if the pin is used as general purpose output. When
reading this address, the buffered state of the pin is returned if the associated data direction register bit is
set to “0”.
If the data direction register bits are set to logic level “1”, the contents of the data register is returned. This
is independent of any other configuration (Figure 2-73).
2.4.2.2 Input register (PTIx)
This is a read-only register and always returns the buffered state of the pin (Figure 2-73).
2.4.2.3 Data direction register (DDRx)
This register defines whether the pin is used as a input or an output.
If a peripheral module controls the pin the contents of the data direction register is ignored (Figure 2-73).
Independent of the pin usage with a peripheral module this register determines the source of data when
reading the associated data register address (2.4.2.1/2-121).
S12XS Family Reference Manual, Rev. 1.13
Freescale Semiconductor
121