S9S12XS256J0CAL Datasheet, PDF (114/738 Pages) Freescale Semiconductor, Inc – Microcontrollers

Port Integration Module (S12XSPIMV1)
2.3.61 Port J Reduced Drive Register (RDRJ)
Address 0x026B
R
W
Reset
7
RDRJ7
0
1 _{Read: Anytime}
Write: Anytime
6
5
4
3
2
0
0
0
0
RDRJ6
0
0
0
0
0
Figure 2-59. Port J Reduced Drive Register (RDRJ)
Access: User read/write¹
1
0
RDRJ1
RDRJ0
0
0
Table 2-58. RDRJ Register Field Descriptions
Field
Description
7-6, 1-0
RDRJ
Port J reduced drive—Select reduced drive for outputs
This bit configures the drive strength of the associated output pin as either full or reduced. If a pin is used as input
this bit has no effect. The reduced drive function is independent of which function is being used on a particular pin.
1 Reduced drive selected (approx. 1/5 of the full drive strength).
0 Full drive strength enabled.
2.3.62 Port J Pull Device Enable Register (PERJ)
Address 0x026C
R
W
Reset
7
PERJ7
1
1 _{Read: Anytime}
Write: Anytime
6
5
4
3
2
0
0
0
0
PERJ6
1
1
1
1
1
Figure 2-60. Port J Pull Device Enable Register (PERJ)
Access: User read/write¹
1
0
PERJ1
PERJ0
1
1
Table 2-59. PERJ Register Field Descriptions
Field
Description
7-6, 1-0
PERJ
Port J pull device enable—Enable pull device on input pin
This bit controls whether a pull device on the associated port input pin is active. If a pin is used as output this bit has
no effect. The polarity is selected by the related polarity select register bit.
1 Pull device enabled
0 Pull device disabled
S12XS Family Reference Manual, Rev. 1.13
114
Freescale Semiconductor